ty semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and SSM3K7002BFU high-speed switching applications analog switch applications ? small package ? low on-resistance : r ds(on) = 3.3 (max) (@v gs = 4.5 v) : r ds(on) = 2.6 (max) (@v gs = 5 v) : r ds(on) = 2.1 (max) (@v gs = 10 v) absolute maximum ratings (ta = 25c) characteristics symbol rating unit drain-source voltage v dss 60 v gate-source voltage v gss 20 v dc i d 200 drain current pulse i dp 800 ma drain power dissipation (ta = 25c) p d (note 1) 150 mw channel temperature t ch 150 c storage temperature range t stg ? 55 to 150 c note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage a nd the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/vol tage, etc.) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 1: mounted on fr4 board (25.4 mm 25.4 mm 1.6 mm, cu pad: 0.6mm 2 3) marking equivalent circuit (top view) unit: mm weight: 6.0 mg (typ.) 0.6 mm 1.0 mm nm 1 2 3 1 2 3 product specification 1 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com
electrical characteristics (ta = 25c) characteristics symbol test condition min typ max unit gate leakage current i gss v gs = 20 v, v ds = 0 v ? ? 10 a v (br) dss i d = 10 ma, v gs = 0 v 60 ? ? drain-source breakdown voltage v (br) dsx i d = 10 ma, v gs = -10 v 45 ? ? v drain cutoff current i dss v ds = 60 v, v gs = 0 v ? ? 1 a gate threshold voltage v th v ds = 10 v, i d = 0.25 ma 1.5 ? 3.1 v forward transfer admittance ? y fs ? v ds = 10 v, i d = 200 ma (note 2) 225 ? ? ms i d = 500 ma, v gs = 10 v (note 2) ? 1.62 2.1 i d = 100 ma, v gs = 5 v (note 2) ? 1.90 2.6 drain-source on-resistance r ds (on) i d = 100 ma, v gs = 4.5 v (note 2) ? 2.10 3.3 input capacitance c iss ? 17.0 ? reverse transfer capacitance c rss ? 1.9 ? output capacitance c oss v ds = 25 v, v gs = 0 v, f = 1 mhz ? 3.6 ? pf turn-on delay time td (on) ? 3.3 6.6 switching time turn-off delay time td (off) v dd = 30 v , i d = 200 ma , v gs = 0 to 10 v ? 14.5 40 ns drain-source forward voltage v dsf i d = -200 ma, v gs = 0 v (note 2) ? -0.84 -1.2 v note2: pulse test switching time test circuit precaution let v th be the voltage applied between gate and sour ce that causes the drain current (i d ) to be low (0.25 ma for the SSM3K7002BFU). then, for norma l switching operation, v gs(on) must be higher than v th, and v gs(off) must be lower than v th. this relationship can be expressed as: v gs(off) < v th < v gs(on). take this into consideration when using the device handling precaution when handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. operators should wear antistatic clothing , and containers and other objects that come into direct contact with devices should be made of antistatic materials. (c) v out (b) v in (a) test circuit td (on) 90 % 10 % 0 v 10 v 10 % 90 % td (off) t r t f v dd v ds ( on ) v dd = 30 v duty 1% v in : t r , t f < 2 ns (z out = 50 ) common source ta = 25 c 10 v 0 10 s v dd out in 50 r l SSM3K7002BFU product specification 2 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com
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